First review. Yeah not the best subject but not the worst subject. You will learn lots of logic gates stuff, use an FPGA and have a big project to do. The FPGA is cool has all the buttons, switches, leds and a hex light up panel for clocks. Most of the labs walk you through what you need to do and you can do most of them pretty quickly. It also helps to figure out what you are doing before you even get into the lab. The lecturer, Jonathan Manton, is another monotone one, very dull, does know what he is doing through but I wish he had some brightness. Please do yourself the favour and actually remember what you did all the way back from the first week of the big project to the very last. They will ask you all sorts of questions in the oral presentation which you sit down and just try to come up with some answers. looking back i didnt prepare well enough for this. Remember HDL is hardware description langauge, the questions range from easy, medium, hard. The marking is kinda weird in it too but it will always be complained about and they wont do anything. i did this subject just in case i wanted to go into electrical, its a blessing in disguise because its what i ended up going with. From memory the written reports and just a bunch of very long worksheet that you go through when doing the lab and they come around to assist you if you need any questions. Content kinda difficult at some stages ie timing and all that confused me. Pairs nicely with FoEN. Do it if you know you wanna do Elec Eng, may not be worth Mech Eng though? Hope that helps.

Anonymous, Semester 1, 2025