Digital System Design
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Hello potential tutees! My name is Thomas and I graduated from the University of Melbourne in 202...
Fairly straightforward and interesting, practical subject that teaches you about digital theory, Verilog/modelsim and FPGAs. Project was fun too. *Note this subject is being replaced by 'ELEN20006' from 2022 onwards
Anonymous, Semester 1, 2021
Very hard subject, study very basic hardware language (verilog).